Semiconductor Physics: Foundations of Modern Electronics

Semiconductor physics governs the behavior of materials whose electrical conductivity falls between that of conductors and insulators, forming the operational basis for transistors, diodes, integrated circuits, and photovoltaic cells. The global semiconductor industry reached $526.8 billion in revenue in 2023 (Semiconductor Industry Association), underscoring the economic and technological centrality of this domain. The physics principles underlying these devices draw from quantum mechanics, solid-state and condensed matter physics, and electromagnetism, making semiconductor physics one of the most consequential intersections of fundamental science and industrial application.

• Definition and Scope
• Core Mechanics or Structure
• Causal Relationships or Drivers
• Classification Boundaries
• Tradeoffs and Tensions
• Common Misconceptions
• Checklist or Steps (Non-Advisory)
• Reference Table or Matrix
• References

Definition and scope

A semiconductor is a crystalline or amorphous solid whose electrical conductivity—typically in the range of 10⁻⁶ to 10⁴ S/cm at room temperature—can be precisely controlled through doping, temperature variation, and applied electric fields. Silicon (Si), with a band gap of approximately 1.12 eV at 300 K, dominates commercial production, constituting over 95% of the wafer market. Germanium (Ge), gallium arsenide (GaAs), silicon carbide (SiC), and gallium nitride (GaN) serve specialized roles in high-frequency, high-power, and optoelectronic applications.

The scope of semiconductor physics encompasses the electronic band structure of crystalline solids, carrier transport phenomena (drift and diffusion), recombination and generation mechanisms, junction behavior at interfaces between differently doped regions, and quantum confinement effects in nanostructured devices. The field interfaces directly with materials science in crystal growth and defect engineering, with electrical engineering in circuit design and device fabrication, and with applied physics in photonics and sensor technologies. Regulatory and standards oversight for semiconductor manufacturing processes in the United States involves bodies such as SEMI (Semiconductor Equipment and Materials International) and the National Institute of Standards and Technology (NIST).

Core mechanics or structure

Band theory and the band gap

The electronic properties of semiconductors arise from the quantum-mechanical solution to electrons in a periodic crystal lattice. As described by Bloch's theorem, electron wavefunctions in a crystal form allowed energy bands separated by forbidden regions called band gaps. The valence band (highest occupied energy band at absolute zero) and the conduction band (lowest unoccupied band) are separated by the band gap energy (E_g). For silicon, E_g ≈ 1.12 eV; for GaAs, E_g ≈ 1.42 eV; for GaN, E_g ≈ 3.4 eV. This framework emerges from quantum mechanics and the periodicity of atomic potentials as studied in solid-state physics.

Doping and carrier concentration

Intrinsic (undoped) semiconductors have equal concentrations of electrons and holes, governed by the relation n_i² = n × p, where n_i for silicon at 300 K is approximately 1.5 × 10¹⁰ cm⁻³. Extrinsic semiconductors are created by introducing impurity atoms: donor atoms (e.g., phosphorus in silicon) contribute excess electrons (n-type), while acceptor atoms (e.g., boron in silicon) create excess holes (p-type). Doping concentrations in modern devices range from approximately 10¹⁴ cm⁻³ (lightly doped substrate) to over 10²⁰ cm⁻³ (degenerate doping for ohmic contacts).

p-n junction

The p-n junction—formed at the interface between p-type and n-type regions—is the foundational device structure. Diffusion of majority carriers across the junction creates a depletion region with a built-in potential (approximately 0.7 V for silicon). The junction exhibits rectifying behavior: forward bias reduces the barrier and permits exponential current increase; reverse bias widens the depletion region and permits only minimal leakage current until breakdown. This behavior is quantified by the Shockley diode equation: I = I₀(e^(qV/nkT) − 1), where q is the electron charge (1.602 × 10⁻¹⁹ C), k is Boltzmann's constant, T is temperature, and n is the ideality factor.

Transistor operation

The metal-oxide-semiconductor field-effect transistor (MOSFET) controls current between source and drain terminals via a voltage applied to an insulated gate electrode. Gate oxide thicknesses in advanced nodes have decreased to below 2 nm equivalent oxide thickness (EOT), creating quantum tunneling challenges. Bipolar junction transistors (BJTs) rely on minority carrier injection across a thin base region. Both device families derive their switching and amplification properties from the controllable conductivity inherent to semiconductors.

Causal relationships or drivers

Temperature dependence: Intrinsic carrier concentration increases exponentially with temperature (n_i ∝ e^(−E_g/2kT)), meaning semiconductor devices exhibit strong thermal sensitivity. Elevated temperatures increase leakage currents and can shift threshold voltages, directly driving the need for thermal management in physics in engineering applications.

Scaling and quantum effects: As transistor gate lengths have decreased—reaching 3 nm in commercial production nodes as of TSMC's N3 process—short-channel effects, quantum tunneling through gate oxides, and statistical dopant fluctuation become dominant performance limiters. These quantum-scale phenomena connect semiconductor physics to quantum field theory at the boundary of device modeling.

Material band gap and application: The band gap energy directly determines the wavelength of light a semiconductor can absorb or emit (λ = hc/E_g). GaAs (E_g ≈ 1.42 eV) emits near-infrared light suited for fiber-optic communications. GaN (E_g ≈ 3.4 eV) enables blue and ultraviolet LEDs. Silicon's indirect band gap makes it inefficient for light emission but highly effective for photovoltaic absorption across the visible spectrum—a relationship explored further in optics and energy conservation contexts.

Defect and impurity control: Crystal defects—dislocations, vacancies, interstitials—act as recombination centers that degrade carrier lifetime. The Czochralski growth method produces silicon ingots with dislocation densities below 100 cm⁻² for high-quality wafers. Impurity levels are controlled to parts-per-billion concentrations, as even 1 ppm of a deep-level impurity can reduce minority carrier lifetime by orders of magnitude.

Classification boundaries

Semiconductor materials are classified along distinct axes that determine device suitability:

Elemental vs. compound: Elemental semiconductors (Si, Ge) consist of a single atomic species. Compound semiconductors (GaAs, InP, SiC, GaN) combine two or more elements and typically offer direct band gaps, higher electron mobility, or wider band gaps suited for specialized applications.

Direct vs. indirect band gap: In direct band gap materials (GaAs, GaN), the conduction band minimum and valence band maximum occur at the same crystal momentum (k-value), enabling efficient radiative recombination. Indirect band gap materials (Si, Ge) require phonon assistance for optical transitions, making them poor light emitters but effective for electronic switching and photovoltaic absorption.

Wide band gap vs. narrow band gap: Materials with E_g > 2 eV (SiC at 3.26 eV, GaN at 3.4 eV) are classified as wide band gap semiconductors, prized for high-temperature, high-voltage, and high-frequency operation. Narrow band gap materials (InSb at 0.17 eV, PbSe at 0.27 eV) serve infrared detection applications.

Intrinsic vs. extrinsic: Intrinsic semiconductors have conductivity determined solely by thermal generation. Extrinsic semiconductors derive their conductivity predominantly from intentional doping, and their classification as n-type or p-type defines the majority carrier species.

The boundary between a semiconductor and an insulator is not absolute; diamond (E_g ≈ 5.47 eV) can function as a wide band gap semiconductor under appropriate doping conditions, illustrating that classification depends on context and application rather than rigid cutoffs.

Tradeoffs and tensions

Mobility vs. band gap: Materials with wider band gaps generally exhibit lower electron mobility. Silicon's electron mobility is approximately 1,400 cm²/V·s; GaN's is roughly 1,000–2,000 cm²/V·s depending on crystal quality; GaAs offers approximately 8,500 cm²/V·s with a moderate band gap. Device designers must balance the need for high switching speeds (favoring high mobility) against voltage handling and thermal stability (favoring wide band gaps).

Scaling vs. reliability: Continued transistor scaling increases integration density and performance but introduces reliability challenges—including time-dependent dielectric breakdown (TDDB), hot carrier injection, and negative bias temperature instability (NBTI). The International Roadmap for Devices and Systems (IRDS) documents these tensions at each technology node.

Cost vs. performance: Silicon's abundance and mature fabrication infrastructure make it the lowest-cost semiconductor platform. Compound semiconductors (GaN, SiC) deliver superior performance in power electronics and RF applications but cost 5–20× more per unit area for wafer production, creating persistent tension between performance optimization and economic feasibility.

Purity vs. doping precision: Achieving ultrahigh-purity base material (>99.9999999% for electronic-grade silicon, often called "nine nines") enables precise doping control but requires energy-intensive purification processes—a tension between material quality and environmental or economic cost.

Common misconceptions

"Semiconductors are poor conductors": Semiconductors are not simply weak conductors. Their defining characteristic is tunable conductivity spanning over 10 orders of magnitude through doping and applied fields. A heavily doped semiconductor can approach metallic conductivity levels.

"Doping adds free electrons or holes to the bulk": Doping introduces substitutional impurity atoms into the crystal lattice at specific lattice sites, not free particles into an amorphous matrix. The ionization of these impurities at operating temperatures releases carriers into the band structure.

"Silicon is the best semiconductor": Silicon dominates due to its oxide quality (SiO₂ forms an exceptionally stable native insulator), abundance, and decades of process optimization—not because its intrinsic electronic properties are superior. GaAs, GaN, and SiC outperform silicon in mobility, band gap, or thermal conductivity for specific applications.

"The p-n junction works by electrons flowing from n to p": Under forward bias, majority carriers from both sides are injected across the junction: electrons from n-type into p-type and holes from p-type into n-type. The current is bidirectional in carrier species, not a one-directional electron flow.

"Moore's Law is a law of physics": Moore's Law—the observation by Gordon Moore in 1965 that transistor count per chip doubles approximately every two years—is an empirical trend driven by engineering innovation, not a physical law. The trend has encountered physical limits related to atomic-scale dimensions and power density as explored across the branches of physics relevant to nanoscale device behavior. The broader context of how empirical observation and physical law interrelate is addressed in the discussion of how science works.

Checklist or steps (non-advisory)

The following sequence describes the standard process flow for fabricating a silicon MOSFET, reflecting industry-standard CMOS (complementary metal-oxide-semiconductor) processing:

1. Wafer preparation — A single-crystal silicon wafer (typically 300 mm diameter for advanced fabs) undergoes chemical-mechanical polishing to sub-nanometer surface roughness.
2. Oxidation — Thermal oxidation grows a thin SiO₂ layer (gate oxide) at 800–1,100°C; high-k dielectrics (e.g., HfO₂) replace SiO₂ at nodes below 45 nm.
3. Photolithography — Ultraviolet or extreme ultraviolet (EUV, 13.5 nm wavelength) light patterns a photoresist layer to define device features.
4. Ion implantation — Dopant ions (boron, phosphorus, arsenic) are accelerated at energies of 1 keV to 1 MeV and implanted into defined regions to create source, drain, and well structures.
5. Etching — Plasma-based reactive ion etching (RIE) removes material with sub-nanometer depth control to form gate structures and interconnect trenches.
6. Deposition — Chemical vapor deposition (CVD) or physical vapor deposition (PVD) adds metal layers (copper, tungsten) and dielectric films for interconnects.
7. Annealing — Rapid thermal annealing (900–1,050°C for 1–10 seconds) activates implanted dopants and repairs lattice damage.
8. Metallization and packaging — Backend processing forms multilayer metal interconnects (10+ metal layers at advanced nodes), followed by wafer dicing, wire bonding or flip-chip attachment, and encapsulation.

Each step is subject to metrology and inspection using techniques such as scanning electron microscopy (SEM), atomic force microscopy (AFM), and ellipsometry—methods grounded in physics experiments and laboratory methods.

Reference table or matrix

This table serves as a reference for the comparative physics parameters that drive material selection in the semiconductor physics sector and across the broader landscape of device engineering documented in the Physics Authority reference.

References

• Semiconductor Industry Association (SIA) — Global Sales Data
• National Institute of Standards and Technology (NIST) — Semiconductor Programs
• IEEE International Roadmap for Devices and Systems (IRDS)
• SEMI — Semiconductor Equipment and Materials International
• [NSM Archive — Ioffe Institute Semiconductor Parameters](http://www.ioffe.ru/SVA/NSM/Semic